4-to-1 Multiplexer VHDL Code (with-select-when)
4-to-1 Multiplexer is used to select between multiple input lines based on select line. The below code is written using with-select-when statement (concurrent statement). Also enable signal is added for better control. If Enable='1',(i.e.active HIGH), the MUX will work else, with Enable='0', the MUX circuit will produce 'Z' as output. The VHDL code starts with declaration of 3-bit signal 'sig', which gets the value from Enable signal 'en' and two select line input signals S1 and S0 respectively. (& is the concatenation operator) VHDL Code: library IEEE; use IEEE.STD_LOGIC_1164.ALL; entity Mux_41 is Port ( I : in STD_LOGIC_VECTOR (3 downto 0); s0 : in STD_LOGIC; s1 : in STD_LOGIC; en : in STD_LOGIC; Y : out STD_LOGIC); end Mux_41; architecture Behavioral of Mux_41 is signal sig : std_logic_vector(2 downto 0); begin sig <= En&s1&s0; with sig select Y <= I(0) when &